DMAINTST

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Interpret as DMAINTST

EOT=ALL_BITS_IN_THE_USBE, ERR=ALL_BITS_IN_THE_USBS, NDDR=ALL_BITS_IN_THE_USBN

USB DMA Interrupt Status

EOT	End of Transfer Interrupt bit. 0 (ALL_BITS_IN_THE_USBE): All bits in the USBEoTIntSt register are 0. 1 (AT_LEAST_ONE_BIT_IN_): At least one bit in the USBEoTIntSt is set.
NDDR	New DD Request Interrupt bit. 0 (ALL_BITS_IN_THE_USBN): All bits in the USBNDDRIntSt register are 0. 1 (AT_LEAST_ONE_BIT_IN_): At least one bit in the USBNDDRIntSt is set.
ERR	System Error Interrupt bit. 0 (ALL_BITS_IN_THE_USBS): All bits in the USBSysErrIntSt register are 0. 1 (AT_LEAST_ONE_BIT_IN_): At least one bit in the USBSysErrIntSt is set.
RESERVED	Reserved. The value read from a reserved bit is not defined.

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